Silicon carbide semiconductor (SiC) has features of a larger bandgap and a higher dielectric breakdown field intensity approximately by one order of magnitude compared with silicon semiconductor, and therefore is viewed as a promising material for a power device. In particular, when a unipolar device operating only with majority carriers is used, this is effective for the reduction of loss at the time of switching operation because there is no reverse current generated at the time of switching operation in a bipolar device (process of disappearance of excessive minority carriers).
On the other hand, when a unipolar device is used, the resistance at the time of forward operation and the withstand voltage at the time of applying a reverse voltage are determined by the concentration and film thickness of a drift layer. For example, in Equation (4) of Non-Patent Document 1, an empirical formula of a maximum electric field intensity at the time of applying a reverse voltage in accordance with the impurity concentration of a substrate is disclosed. While the relation between the impurity concentration of the substrate and the maximum electric field intensity significantly depends on the fabrication method of a semiconductor device, the maximum electric field intensity is generally increased as the impurity concentration becomes higher in a specific fabrication method. However, since the slope of the electric field in the substrate becomes steeper as the impurity concentration of the substrate becomes higher, the withstand voltage at the time of applying a reverse voltage tends to be decreased. For this reason, in a tradeoff between resistance and withstand voltage, it is required to design an optimum device structure in accordance with the purpose of use.
As a method of improving the tradeoff between resistance and withstand voltage described above, a structure in which a drift layer is multilayered and its concentration and film thickness are independently controlled is disclosed (Patent Document 1). In these documents, a semiconductor layer whose impurity concentration is higher than that of the drift layer is provided on the drift layer, thereby reducing ON resistance of a vertical MOSFET. Also, for the purpose of ensuring withstand voltage of a termination part, a semiconductor layer whose impurity concentration is lower than that of the drift layer is provided on an outermost surface of a p-type guard ring forming part.